refers to situations that prevent the next instructions in the instruction stream from executing during its designated clock cycle
hazards
reduces performance from the ideal speedup gained by the CPI
hazard
the [lower/higher] the value of the computed CPI, the better
lower
classes of hazard (3)
arise from resource conflicts when hardware cannot support all possible combinations of instructions simultaneously in overlapped execution
structural hazards
structural hazards are problematic when there is only one __
memory port
arise when an instruction depends on the results of a previous instruction in a way that is exposed by the overlapping of instructions in the pipeline
data hazards
data hazards can be solved using __ or __ or __
forwarding, bypassing, short-circuiting
types of data hazard (3)
on types of data hazard: (i and j refers to instructions)
j tries to write a destination before it is read by i, so i incorrectly gets the new value
write after read
on types of data hazard: (i and j refers to instructions)
j tries to write an operand before it is written by i
write after write
on types of data hazard: (i and j refers to instructions)
j tries to read a source before i writes it, so j incorrectly gets the old value
read after write
arise from the pipelining branches and other instructions that change the PC
control hazards
occur when two instructions need the same hardware resource at the same time
structural hazards
approaches to resolving structural hazards (3)
on approaches to resolving structural hazards:
programmer explicitly avoids scheduling instructions that would create structural hazards
schedule
on approaches to resolving structural hazards:
addition of hardware components that stalls until earlier instructions are no longer using a resource
stall
on approaches to resolving structural hazards:
add more hardware so that instructions can independently access the resources at the same time
duplicate
occur when one instruction depends on a data value produced by a preceding instruction still in the pipeline
data hazards
approaches to resolving data hazards (4)
on approaches to resolving data hazards:
programmer explicitly avoids scheduling instructions that would create data hazards
schedule
on approaches to resolving data hazards:
puts the instruction that causes the data hazard in the instruction __
nop or no operation
on approaches to resolving data hazards:
hardware includes control logic that freezes earlier stages until preceding instruction has finished producing data value
stall
on approaches to resolving data hazards:
hardware datapath allows values to be sent to an earlier stage before preceding instruction has left the pipeline
bypass