1.1 Fetch-decode-execute cycle 2

Question 1

Describe the fetch-decode-execute sequence of registers

Answer 1

• the PC holds the address of the next location in memory (e.g. 1)
• this is passed to the MAR (e.g. 1)
• the data in the address is then fetched and passed to the MDR (e.g. load address 5)
• the PC is incremented (2) , and a copy of the data is stored in the cache incase it is needed again soon (load address 5)
• the CU decodes the instruction (the MAR now holds address 5 instead of 2)

Question 2

What happens if a calculation needs to be performed?

Answer 2

• the next instruction is executed (e.g. 23 is loaded)
• the number is stored in the ACC (23)
• any calculations are done in the ALU (e.g. 10 is added to 23)
• the results are stored in the ACC (33)

Question 3

What happens if data needs to be stored in memory?

Answer 3

-if something needs to be stored, the data is passed from the ACC to the MDR which then stores it in the memory (e.g. 33 in address 6)

Question 4

State the role of the following registers in the fetch-decode execute cycle.

a) the program counter [1]
b) the memory data register [1]

Answer 4

a) the PC holds the memory address of the next instruction to be processed
b) the memory data register holds an instruction or data that has been fetched from the memory before it is used

Question 5

State the role of these registers in the fetch-decode-execute cycle.

a) the memory address register
b) the accumulator [2]

Answer 5

a) the MDR acts as a temporary storage (buffer) for anything that is copied from memory ready for the CPU to use
b) the ACC stores data as it is being manipulated