What is load-store architecture?
- Data operands must first be loaded into the CPU using the load instruction (LDR) and then stored back into main memory using memory store (STR) to save the results
- Arithmetic and logical operations cannot be performed directly in memory locations
What happens to the PC when an instruction is fetched?
- It is incremented by 4 to hold the address of the next instruction
How many memory addresses does one ARM instruction take?
- The instructions are 32 bits and each memory address holds one byte (8bits) so it takes 4 memory addresses for one instruction
What is the CPSR?
- The current program status register’s 4 MSBs can be optionally set by using the ‘S’ option
- N - negative signed number
- Z - zero bit, where every bit of the result is 0
- C - carry bit, when the operation has carry
- V - overflow bit, set when the a signed arithmetic operation results in overflow
What happens during a single-cycle data processing instruction?
- Two register operands are accesed
- The value on the B bus is shifted (if needed) and operated on in with the the value in the A bus in the ALU
- The result is written back to the register bank
- The program counter value is fed into the incrementer, then the incremented value is copied back into the r15 register bank, and also into the address register to be used as the address for the nect instruction fetch
What is the barrel shifter?
Can shift or rotate the second operand, on the B Bus by a maximum of 32 bits.
What is the instruction decoder?
What translates high level code into assembly code?
The compiler
What type of instruction can modify data values?
Data processing instrctions are the only instructions which modify data values
(All ofther instructions just move data around and control the sequence of program execution)
What are some rules of ARM data processing instructions?
- All operands are 32 bits wide and come from registers or are specified as literals in the instruction itself.
- The result, if there is one, is 32 bits wide and is placed in a register.
- Each of the operand registers and the result register are independently specified in the instruction. That is, the ARM uses a ‘3-address’ format for these instructions
What order must operands be stated in assembly language source code?
- Result register
- First operand
- Second operand
What is changed when the instruction below is executed?
ADD r0, r1, r2
When this instruction is executed the only change to the system state is the value of the destination register r0 (and, optionally, the N, Z, C and V flags in the CPSR for most of the instructions,)
What do comparision operations do?
- They do not produce a result
- They set the condition code vits ( N, Z, C, V) in the CPSR
What is an immediate operand?
- Can be used to add a constant to a register, by replacing the second source register with an immediate value
- The standard size is 8-bits for the immediate operand, but you can use up to 32 bits
How are the condition code flags set?
- Only the comparison operations CMP or TST can set the flags
- In assembly language, an S is added to the opcode.
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