What is the purpose of an interrupt?
To make the processor more efficient
What does it mean for memory to be “volatile”?
It means the contents are lost when the computer is shutdown
What are the 4 basic elements of a computer?
- Processor
- I/O module
- Main memory
- System bus
What is a SoC? What is it used for?
SoC refers to System on a chip. Used primarily for handheld devices, to provide GPUs, codecs and main memory functionality.
What is the basic instruction cycle?
- Program fetches the instruction from memory
- Program Counter (PC) holds the address of the instruction be fetched next, so the PC is incremented after every fetch.
- Processor executes instruction.
What is the “Principle of Locality”?
The principle of locality states that data is organised so that the percentage of access to each successively lower level is substantially less than that of the level above.
In other words, data that you access most frequently will be levels above data you access infrequently.
What is secondary memory?
Refers to the hard drive.
What is a mapping function? What are the constraints that affect the design?
- Mapping function determines which cache location the data block will occupy
What is cache memory?
Cache memory is small amounts of embedded within the processor which stores results.
Accessing memory from cache memory is significantly faster than accessing memory from main memory, and even small caches have significant impact on performance.
What are the two ways to deal with multiple interrupts?
- Simply ignore other interrupts.
2. Set priorities for interrupts. The interrupt with the highest priority will interrupt.
What is the Write Policy in terms of main memory?
The write policy dictates when the memory write operation takes place.
What are the 3 I/O techniques?
- Programmed I/O
- Interrupt Driven I/O
- Direct Memory Access (DMA)
What is programmed I/O?
- I/O module performs requested action
- Processor periodically checks the I/O module until it determines the instruction is complete.
- Worst performance out of the 3 techniques. Very slow.
What is interrupt driven I/O?
- Processor issues an I/O command to a module then goes on to do some other useful work
- The I/O module will then interrupt the processor to request service when it is ready to exchange data with the processor
- The processor executes the data transfer and then resumes its former processing
- More efficient than programmed I/O, second best I/O technique
What is DMA?
- DMA (Direct Memory Access)
- Performed by a seperate module on the system bus OR incorporated into an I/O module
- When the processor wishes to read or write data it issues a command to the DMA module containing a block of data
- It transfers the entire block of data directly to and from memory without going through the processor.
- The processor is only involved at the beginning and the end of the transfer
- Because it doesn’t periodically check if the I/O module has completed the instruction (programmed I/O) and also doesn’t have to go through the processor (Interrupt Driven I/O), it is the most efficient of the 3 I/O techniques.
What is SMP?
- SMP, or Symmetric Multiprocessors
- A stand-alone computer system with the following characteristics:
- Two or more similar processors of comparable capability
- processors share the same main memory and are interconnected by a bus or other internal connection scheme
- Processors share the same access to I/O devices
- All processors can perform the same functions
- The system is controlled by an integrated operating system that provides interaction between processors and their programs at the job, task, file and data element levels.
- Easy way to remember:
- Symmetric = Made up of the same parts
- Multiprocessors = Multiple processors
- In this case, we have multiple processors that each share the same I/O devices, memory and can perform the same functions
What is a multicore computer?
- AKA Chip multiprocessor
- Combines two or more processors on a single piece of silicon
- In addition, multicore chips also include L2 cache and in some cases L3 cache.
