Scalar Processing
Processes more than one instruction per click cycle
Superscalar Processing
Processes more than one instruction per click cycle
Wide Path Memory Access
Retrieves multiple bytes instead of 1 byte at a time
Memory Interleaving
Partition memory into subsections
Symmetrical Multiprocessing
Each CPU has equal access to resources
Fetch Unit
Instruction fetch unit
Execution Unit
Receives instruction from decoder unit and executes
In Cache Memory blocks are
between 8 and 64 bytes
Cache Line
Unit of transfer between storage and cache memory