CPU Architecture

Question 1

What is a register?

Answer 1

Very quick and small storage memory inside the CPU

Question 2

What does the mnemonic of an LMC command do

Answer 2

Tells the CPU what operation to carry out

Question 3

What does the operand of an LMC command do

Answer 3

States the data the operation should use (the address off the instruction)

Question 4

Why is assembly language not portable

Answer 4

It is unique to the processor family it is designed for

Question 5

What are three buses

Answer 5

Address bus, data bus, control bus

Question 6

What does the address bus transfer

Answer 6

Transfers the address from MAR to RAM

Question 7

What does the data bus do

Answer 7

Carries the actual data between the CPU and RAM

Question 8

What does the control bus do

Answer 8

Carries the signal that states whether the CPU is reading from or writing to RAM

Question 9

What are the five stages of the fetch part of LMC

Answer 9

1. Contents of PC copied to MAR
2. PC increments
3. MAR will send signal to RAM along the buses
4. MDR will send data along the data bus
5. Contents of MDR copied to CIR

Question 10

What are the different types of registers?

Answer 10

Program Counter, Memory Address Register, Memory Data Register, Accumulator, Current Instruction Register

Question 11

What are the two types of registers that contain an address

Answer 11

Program counter, Memory Address Register

Question 12

What is the LMC operation for ending an algorithm

Answer 12

HLT

Question 13

What is the LMC operation for adding a value of an address to the accumulator

Answer 13

ADD

Question 14

What is the LMC operation for subtracting a value of an address from the accumulator

Answer 14

SUB

Question 15

What is the LMC operation for storing the value of the accumulator

Answer 15

STA

Question 16

What is the LMC operation for loading the value of thee accumulator from memory

Answer 16

LDA

Question 17

What is the LMC operation for branching to another instruction, no matter the value of the accumulator

Answer 17

BRA

Question 18

What is the LMC operation for branching to another instruction if the value of accumulator is zero

Answer 18

BRZ

Question 19

What is the LMC operation for branching to another instruction, if the value of the accumulator is positive or zero

Answer 19

BRP

Question 20

What is the LMC operation for taking inputs

Answer 20

INP

Question 21

What is the LMC operation for outputting values

Answer 21

OUT

Question 22

What is the LMC operation for assigning variables

Answer 22

{name} DAT {starting value}

Question 23

What is meant by processor performance

Answer 23

The number of instructions that a processor can complete per second

Question 24

What are the three factors that affect CPU performance

Answer 24

• Clock speed
• Number of cores
• The amount and type of cache

Question 25

When can a CPU operation commence

Answer 25

On a switch from 0 to 1

Question 26

What does the clock speed provide

Answer 26

An upper limit to the maximum number of operations that may take place per second

Question 27

What is clock speed measured in

Answer 27

Hertz (Hz)

Question 28

When do bottlenecks occur

Answer 28

When performance is being limited by one aspect of the device

Question 29

What does having more cores help with

Answer 29

Multitasking

Question 30

What happens when the user is multitasking and has a single core CPU

Answer 30

The processor switches between running the instructions of each program

Question 31

What is pipelining

Answer 31

When the CPU handles different instructions simultaneously

Question 32

What can be done to serparate a problem into parts that can be worked on simultaneously

Answer 32

Parallel processing / multi-threading

Question 33

What is the function of cache

Answer 33

Store frequently used data and instructions

Question 34

What are the three different levels of cache

Answer 34

L1, L2, L3

Question 35

Which two levels of cache exist in individual cores

Answer 35

Level 1 and 2

Question 36

Which level of cache is shared between all the cores

Answer 36

Level 3

Question 37

What needs to happen when the processor no longer needs to execute instructions that it was fetching and decoding

Answer 37

"flush the pipe"

Question 38

How can modern day processors avoid "flushing the pipe" from every happening

Answer 38

Branch prediction

Question 39

What are words

Answer 39

Chunks of data most commonly used by the computer

Question 40

In what instance causes the processor to "flush the pipe"

Answer 40

Branch misprediction

Question 41

Why must the size operand be at least the width of an address bus

Answer 41

An operand can be an address; so it must be at least the width o the address bus

Question 42

What needs to happen when you "flush the pipe"

Answer 42

— Clear the CIR — Update PC (rest of fetch cycle is carried out)

Question 43

What is the stored program concept

Answer 43

- A program made up of machine code that is stored in memory to be executed - The instructions are fetched from memory one at a time, decoded and executed

Question 44

What is the Von Neumann architecture

Answer 44

Has a single memory and a single data bus which transfers both data and instructions

Question 45

What is the Havard architecture

Answer 45

Has separate memories for instructions and data

Question 46

Which architecture allows an instruction to be fetched while a data read/write command is occuring

Answer 46

Havard

Question 47

Which architecture is most used in conventional processors

Answer 47

Von Neumann

Question 48

Which architecture is most used in embedded systems

Answer 48

Harvard

Question 49

Which architecture share the same memory for data and instructions

Answer 49

Von Neumann

Question 50

Which architecture share separate memories for data and instructions

Answer 50

Harvard

Question 51

Which architecture only uses one bus for both data and instructions

Answer 51

Von Neumann

Question 52

Which architecture uses separate buses for data and instructions

Answer 52

Harvard

Question 53

How does modern computer architecture work

Answer 53

Better performing cache whilst keeping flexibility

Question 54

What does SIMD stand for

Answer 54

Single Instruction Multiple Data

Question 55

What is another name for SIMD

Answer 55

Vectorisation

Question 56

What does SIMD really do

Answer 56

Allows the same instruction to be applied to multiple pieces of data at the same time

Question 57

What does MIMD stand for

Answer 57

Multiple Instructions Multiple Data

Question 58

What does MIMD really do

Answer 58

Allows multiple different instructions to be carried out on groups of data by making use of multiple cores

Question 59

What is distributed computing

Answer 59

Splitting a single problem up to allow work to be shared between different computers across a network

Question 60

What are the advantages of distributed computing

Answer 60

1. Workload is shared, increasing the speed of execution 2. More resources available, so more computing power 3. If a device fails, the program will not halt

Question 61

What are the disadvantages of distributed computing

Answer 61

Communication needed is slow → must go via networks

Question 62

What specific types of applications commonly use Harvard architecture

Answer 62

Digital Signal Processing (DSP) and some embedded systems

Question 63

How could the modern CPU architecture be better than traditional architectures

Answer 63

1. If using split cache → better performance in cache 2. SIMD and MIMD allows much quicker execution of repetitive operations

Question 64

What programs are less suitable for distributed computing

Answer 64

Programs that require previous results for future calculation

Question 65

What programs are more suitable for distributed computing

Answer 65

Programs where different parts can be completed independently

Question 66

What are the similarities of having a multicore CPU and distributed computing

Answer 66

Running parts of a program using separate CPUs or cores

Question 67

What are the differences of having a multicore CPU and distributed computing

Answer 67

— Communication via networks in distributed computing whilst cores can directly communicate in multicore processors — No shared memory in distributed computing

Question 68

What are the two types of instruction sets

Answer 68

RISC and CISC

Question 69

What does CISC stand for

Answer 69

Complex Instruction Set Computer

Question 70

What does RISC stand for

Answer 70

Reduced Instruction Set Computer

Question 71

What are the benefits of CISC

Answer 71

- High-level code can be translated in fewer assembly instructions - Compilers are easier to create

Question 72

What are the benefits of RISC

Answer 72

— More energy efficient — Simpler hardware — Cheaper

Question 73

What are RISC most commonly used for

Answer 73

Mobile computers

Question 74

What are CISC mostly commonly used for

Answer 74

x86 desktop computers

Question 75

What can be used to make CISC behave more like RISC

Answer 75

Mircocode

Question 76

What is the performance equation for the CPU

Answer 76

Time/ program = time/cycle * cycles/instruction * instructions/program

Question 77

Which part of the performance equation does RISC minimise

Answer 77

Cycles/instruction

Question 78

Which part of the performance equation does CISC minimise

Answer 78

Instructions/program

Question 79

Why might CISC processors perform better with less cache space than RISC processors

Answer 79

CISC processors produce fewer lines of Assembly so more can be stored in cache other than RAM (cache has faster access speeds than RAM)