Define instruction set
Collection of instructions that a CPU can execute. It defines the MLI (machine language instruction) that a processor can understand and process…
(Fetch, decode, execute, store and load)
List the Main categories of instructions in a typical instruction set (DALCI)
Data transfer instruction: Move data between register, memory and I/O devices
Arithmetic Instruction: Performs mathematical operations (e.g. ADD, SUB)
Logical Instruction: Perform bitwise operations (e.g. AND, OR, NOT, XOR)
Control Instruction: Direct Program Flow (e.g JMP, CALL)
I/O instruction: Handle input and output operations (e.g. IN and OUT)
What is the characteristics of RISC
- Focuses on simplyfying instructions to optimize performance
- Design to execute instructions quickly using small, highly optimize set of instructions
- Memory access is limited to specifc instructions + uses a limited number of simple instructions (e.g. LOAD, STORE)
- Instruction can be executed in a single clock, allowing faster processing
What is the characteristics of CISC
- Supports many set of instructions, including specialized ones for complex operation
- For example, a single instruction might perform a memory load, an arithmetic operation and memory store
- CISC instruction can vary in size, which allow for flexible and complex operation
- Slow because complex instruction might take multiple clock cycles, making execution slower
RISC VS CISC
Describe typical format of a machine instruction
Opcode: Specifies the operation to be performed
Operand: Specifies the data to be operated on
Addressing Mode: Specifies how the operand is accessed
Explain the role of opcodes in instruction set
Opcode specifies the operation to be performed. It tells the CPU what action to take such as (Addition, subtraction or data transfer).
What are Addressing modes in instruction Set (IDIRI)
Immediate: Operand is specified in the instruction itself
Direct: Address of the operand is specified in the instruction
Indirect: Address of the operand is found in a register or memory
Register: Operand is in a register
Indexed: Address is calculated using a base adddress
(OAAOA)
Differentiate between ‘immediate’ & ‘direct’ addressing
Describe challenges in implement instuction set architecture (ISA) in computer (HPPMB)
Hardware complexity: Designing processor hardware to support all features of ISA are challenging
Performance optimization: Balancing simplicity of ISA vs need of performance is difficult
Power efficiency: Modern processors must achieve high performance, consume low power
Memory and data handling: Managing memory access efficiently vs supporting different addressing modes challenge
Backward compatibility: Maintaining older versions of ISA while introducing new feature is difficult
Another challenge in ISA, the bottlenecks issue. What are the examples of hardware bottleneck issues
Cache performance
Interconnect Latency
Thermal and power Constraints
What are specific implementation techniques could be used to optimize performance in RISC ? (PSBV)
- Pipelining: Dividing instrcution execution into stages to allow multiple instructions to be processed simultaneously
- Superscalar Architecture: Allowing multiple instructions to be issued per clock cycle
- Branch prediction: Reducing delays caused by control flow
- Vector instructions: Implemenitng SIMD (Single instruction, multiple data) instructions for efficient multimedia and AI processing
