Internal Computer Architecture

Question 1

what is the stored program concept

Answer 1

• the program the proccesser is executing is kept in main memory along with the data the program needs
• the processer fetches one instruction at a time (serially) from main memory and executes it

Question 2

explain the role of the processer

Answer 2

• executes instructions and controls the operation of all components
• executes instructions by repeating 3 operations: Fetch Decode Execute

Question 3

what is the role of the main memory

Answer 3

• holds the current programs that are being executed
• hold current data being processed
• temporary memory: loses its contents when the computr turns off

Question 4

what is the role of the secondary memory and give examples

Answer 4

• permanent storage of data and programs
• eg, HDD and CD drive

Question 5

what are the 3 different buses

Answer 5

1. address
2. control
3. data

Question 6

describe and explain the control bus

Answer 6

• bi-directional bus
• used to transmit command, timing and specific status information between system components
• timing signals ensure components operate in synchrony
• command signals specificy operations to be performed
• status signals indicate conditions of the system, such is wether a device is busy

Question 7

explain the following control lines:
1. memory write
2. memory read
3. I/O write
4. I/O read
5. bus request

Answer 7

1. causes data on data bus to be written to addressed location
2. causes data from addressed location to be placed on data bus
3. causes data on data bus to be output to the addressed I/O port
4. caused data from the addressed I/O port to be placed on the data bus
5. indicates a component needs to gain control of the system bus

Question 8

describe and explain the data bus

Answer 8

• typically consists of 8, 16 or 32 seperate lines
• bi-directional line for moving data and instructions between system components

Question 9

explain the importance of the width of the data bus

Answer 9

• width of data bus is a key factor to determing overall system pecformance
• if data bus is 8 bits wide and each instruction is 16 bits long then the processor must access main memory twice during each instruction cycle

Question 10

explain the address bus

Answer 10

• when the CPU needs to read or write data, it uses the address bus to specify the memory location its interested in
• the width of the address bus determins the maximum amount of memory the computer can access
• the CPU uses the adress bus to fetch instructions and data from memory, enabling the execution of tasks

Question 11

what are five factors affecting processors performance

Answer 11

• width of address bus
• multicore processor
• clock
• word length
• cache memory

Question 12

full explanation

explain the steps of the fetch execute cycle

Answer 12

1. the contents of the program counter (the adress of the next instruction) is placed into the memory address register
2. the adress is sent from the MAR along the adress bus to the main memory. The instruction at that adress is found and returned along the data bus to the memory buffer register
3. at the same time the contents of the program counter is increased by 1, to reference the next instruction to be executed
4. the MBR loads the current instruction register with the instruction to be executed
5. the instruction is decoded an executed

Question 13

what are the 2 different types of architecture

Answer 13

• Von Neumann
• Harvard

Question 14

compare Von Neumann architecture to Harvard architecture

Answer 14

• VN is an ancient computer architecture whereas H is modern
• Vn has same physical memory address for instructions and data whereas H has seperate physical memoy adresses for instructions and data
• in VN it uses one bus for both data and instructions whereas in H it uses seperate buses
• in Vn two clock cycles are required to execute a single instruction whereas in H a single cycle is needed
• VN is cheaper

Question 15

give the definition for:

processor

Answer 15

a device that carries out computation data by following instructions

Question 16

give the definition for:

main memory

Answer 16

RAM
stores data and instructions that will be used by the processor

Question 17

give the definition for:

read only memory (ROM)

Answer 17

stores data that can be read from but not written to

Question 18

give the definition for:

bus

Answer 18

microscopic parallel wires that transmit data between internal components

Question 19

give the definition for:

data bus

Answer 19

transfers the data between the processor and memory

Question 20

give the definition for:

word length

Answer 20

the number of bits that can be addressed, transferred or manipulated as one unit

Question 21

give the definition for:

address bus

Answer 21

used to specify a specific address in memory so that the data bus can access it

Question 22

give the definition for:

control bus

Answer 22

controls the flow of data between the processor and other parts of the computer

Question 23

give the definition for:

von neumann architecture

Answer 23

a technique for building a processor where data and instructions are stored in the same memory and accessed via buses

Question 24

give the definition for:

harvard architecture

Answer 24

technique for building a processor that uses seperate buses and memory for data instruction

Question 25

# give the definition for: arithmetic logic unit (ALU)

Answer 25

part of the processor that performs the arithemtic and logical operations

Question 26

# give the definition for: clock

Answer 26

a device that generates a signal used to synchronise the components of a computer

Question 27

# give the definition for: register

Answer 27

a small section of temporary storage that is part of the processor. Stores data or control instructions during the fetch-decode-execute cycle

Question 28

# give the definition for: status register

Answer 28

keeps track of the various functions of the computer such as if the result of the last calculation is positive or negative

Question 29

# give the definition for: current instruction register (CIR)

Answer 29

register that stores the instructions that the CPU is currently decoding/exectuting

Question 30

# give the definition for: program counter (PC)

Answer 30

register that stores the address of the next instruction to be taken from main memory into the processor

Question 31

# give the definition for: memory buffer register (MBR)

Answer 31

register that stores data to or from the main memory

Question 32

# give the definition for: memory address register (MAR)

Answer 32

register that stores the location of the address that the CPU wishes to access

Question 33

# give the definition for: bus width

Answer 33

the number of bits that can be sent down a bus in one go

Question 34

# give the definition for: multi-core

Answer 34

a chip with more than 1 processor

Question 35

# give the definition for: cache

Answer 35

a high speed temporary area of memory

Question 36

explain why the data bus must be bidirectional

Answer 36

* it is responsible for carrying data to and from the CPU and memory * it has to read and write data

Question 37

# describe 1. what cache memory is 2. what cache memory is used for 3. how increasing the amount of cache memry can improve the performance of a processor

Answer 37

1. memory that can be accessed very quickly 2. stores the most frequent and most recently used instructions/data 3. more instructions/data can be stored in the cache so they can be accessed more quickly than being accessed from main memory

Question 38

describe one situation that the harvard architecture is used for

Answer 38

microprocessors

Question 39

describe the steps involved in the **decode** stage of the fetch decode execute cycle

Answer 39

* decode instruction held by the CIR * instruction split into opcode and operand

Question 40

describe the steps involved in the **execute** stage of the fetch decode execute cycle

Answer 40

* if necessary, data is fetched * if necessary, data is stored into main memory

Question 41

explain why the harvard architecture is sometimes used in preference to the von neuman

Answer 41

* data and instruction can be accessed simultaneously * recuce delays waiting for memory fetches