Truth table for NOT logic gate
INPUT OUTPUT
A Q = NOT A
0 1
1 0
Truth table for AND logic gate
INPUTS OUTPUT A B Q 0 0 0 0 1 0 1 0 0 1 1 1
Truth table for OR logic gate
INPUTS OUTPUT A B Q 0 0 0 0 1 1 1 0 1 1 1 1
Truth table for XOR logic gate
INPUTS OUTPUT A B A XOR B 0 0 0 0 1 1 1 0 1 1 1 0
Truth table for NAND logic gate
A B A AND B NOT (A AND B) 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0
Truth table for NOR logic gate
A B A OR B NOT (A OR B) 0 0 0 1 0 1 1 0 1 0 1 0 1 1 1 0
Construct a half adder
A and B leading to both AND gate and XOR gate. Top line (Carry A.B) bottom line (SUM A+B)
What is the use of an edge triggered D type flip flop circuit?
Every other clock signal, the value of Q changes