Memory Consistency

Question 1

What is memory consistency?

Answer 1

Memory consistency defines the order of access to different addresses.

Question 2

When do memory consistency issues happen?

Answer 2

When the processor reorders instructions and interleaved instructions from different cores can result in an output that is not possible if executed in program order

Question 3

What is sequential consistency?

Answer 3

The result of any execution should be as if accesses executed by each processor were executed in-order and accesses among different processors were arbitrarily interleaved

Question 4

How to implement sequential consistency

Answer 4

• Core can reorder loads, detects when there is a problem and fix it
• Use ROB to keep track of program order
• If there is a write to an address that we loaded out of order, then can drop all the entries in the ROB after that load (since it hasn’t been committed yet)
• Must snoop traffic on bus for any writes to an address that we loaded out of order
• Only way to get memory inconsistency is to have a write to an address that we loaded out of order

Question 5

What is relaxed consistency?

Answer 5

Class of consistency that is more relaxed than sequential, but better than nothing.

Question 6

What are the 4 types of ordering?

Answer 6

WR A -> WR B
WR A -> RD B
RD A -> WR B
RD A -> RD B

Question 7

What is the MSYNC instruction?

Answer 7

special x86 instruction that guarantees that all accesses are completed before MSYNC, and that MSYNC happens before all subsequent accesses

Question 8

What is a data-race free program?

Answer 8

Use barriers to achieve sequential consistency, even if hardware is not using it