Module 6: Instruction Set Architecture

Question 1

address space

Answer 1

number of drawers

Question 2

addressability

Answer 2

number of bits per drawer

Question 3

data memory

Answer 3

memory where we store data (not instructions)

Question 4

decoder

Answer 4

takes instruction apart and determines necessary control signals

Question 5

Instruction Set Architecture

Answer 5

programmer visible components and operations

1. everything needed to create a program for CPU
2. serves as “contract” between programmer and CPU designer
3. different implementations of the same ISA and “binary compatible”

Question 6

opcode

Answer 6

the portion of a machine language instruction that specifies the operation to be performed; abbreviated from operation code, also known as instruction syllable, instruction parcel, or opstring

Question 7

process status word register (PSR)

Answer 7

16-bit register where the lower 3 bits store the NZP bits. the PSR[15] stores the privilege level that the CPU is currently operating in

Question 8

program memory

Answer 8

where we store our instructions

Question 9

sign extension

Answer 9

the operation (in computer arithmetic) of increasing the number of bits of a binary number while preserving the number’s positive/negative sign and value

Question 10

NZP broken into 3 parts

Answer 10

3 parts:

1. NZP tester (3-bits out): tests the output of the ALU for negative, zero, or positive
2. NZP register (3-bits out, stored in the PSR, bits [2:0], NZP.WE = 1 for ANY instruction that writes to RegFile or PSR[15]
3. TEST (1 bit out): top input: I[11:9} (3 bit user condition), bottom input: the output of the NZP (previous ALU’s value’s negative zero or positive)

Question 11

7 instruction categories

Answer 11

1. Arithmetic instructions (ADD, SUB, MUL, DIVIDE, etc)
2. Logical instructions (BITWISE AND, OR, etc.)
3. Shift instructions
4. Comparison instructions
5. Load/store instructions
6. Loading constants
7. Program control
   - branches
   - jumps
   - TRAP, RTI: operating system calls

Question 12

von Neumann Loop

Answer 12

1. Fetch instruction at PC
2. Decode instruction (convert to control signals)
3. Execute instruction (read inputs, operate, write output)
4. Update PC

Question 13

For each instruction, consider:

Answer 13

1. whether or not it modifies the register
2. whether or not it modifies the program status register, including the NZP bits
3. Whether or not it modifies data memory
4. How it can change the PC

Question 14

True/False: Every instruction changes the state of the processor in some way

Answer 14

TRUE