1
Q
What does ‘ARTIC OS’ primarily refer to?
A
The real-time firmware/kernel that runs on IBM’s ARTIC communication adapters
2
Q
What type of kernel is ARTIC OS?
A
Real-time, multi-tasking kernel
3
Q
What CPU architecture does ARTIC OS utilize?
A
Intel i960
4
Q
What is one of the main functions of ARTIC OS?
A
Off-load time-critical communications and protocol handling from the host
5
Q
What type of hardware interface does ARTIC OS operate on?
A
32-bit PCI or Micro Channel interface
6
Q
What era of host support is available for ARTIC OS?
A
DOS, OS/2 Warp, AIX, Novell NetWare, and Windows NT
7
Q
Name a typical application of ARTIC OS.
A
WAN protocol offload
8
Q
What is a key advantage of using ARTIC OS?
A
Deterministic timing
9
Q
What does ‘ECC’ stand for in the context of ARTIC OS?
A
Error-Correcting Code
10
Q
True or False: ARTIC OS is a general-purpose desktop/server operating system.
A
False
11
Q
What are some common vertical systems that utilize ARTIC OS?
A
- Airline/hotel reservations
- Manufacturing/process control
- Telephony
- Satellite links
12
Q
What is a potential risk associated with ARTIC OS?
A
Obsolescence & supply
13
Q
What does ‘DMA’ stand for?
A
Direct Memory Access
14
Q
Fill in the blank: ARTIC OS provides _______ messaging and DMA to minimize host interrupts.
A
peer-to-peer
15
Q
What is one of the useful metrics to track for adapter/kernel performance?
A
Interrupt-to-DMA latency & jitter
16
Q
What type of memory management does ARTIC OS include?
A
ECC memory and memory protection
17
Q
What is the purpose of the ‘AIB’ in ARTIC OS?
A
Application Interface Board connectivity
18
Q
What is one way ARTIC OS achieves robustness?
A
Integrated trace/debug/status tools
19
Q
What type of protocols does ARTIC OS typically handle?
A
- X.25/LAPB
- ISDN PRI
- T1/E1
- ATM
20
Q
What are the core building blocks of the ARTIC OS firmware?
A
- Real-time kernel
- Messaging API
- Memory manager
- Trace & debug
- Protocol modules
- Host drivers & SDK
21
Q
What operation would you perform to initialize the adapter in ARTIC OS?
A
initialize_adapter()
22
Q
What parameters are involved in configuring a port in ARTIC OS?
A
- interface
- clocking
- line speed
- framing/encoding
- CTS/RTS behavior
- RX/TX buffer lengths
23
Q
What is the function of the operation ‘send_msg_to_host()’?
A
Facilitates host ↔ adapter messaging
24
Q
What does ‘MTBF’ stand for in the context of reliability metrics?
A
Mean Time Between Failures
25
What is a characteristic of the fast-path for receiving data in ARTIC OS?
line-interrupt → ISR validates frame → DMA to packet memory
26
What modern alternatives exist to ARTIC OS for offloading tasks?
* SmartNICs/DPUs
* FPGA or MCU front-ends
* Contemporary RTOSes
* IP-native transports with TLS/VPN
27
What are SmartNICs / DPUs?
Modern host-offload solutions like NVIDIA BlueField, Intel IPU, Marvell OCTEON, and AMD Alveo for high-rate L2–L7 processing
## Footnote
Examples include Arm cores, hardware offloads for networking, storage, crypto, and various operational modes.
28
List typical applications for SmartNICs / DPUs.
* High-rate L2–L7 processing
* Inline IPSec/TLS
* NVMe-oF
* Telemetry
* Traffic engineering
* Line-rate filtering
* Micro-segmentation
29
What are the advantages of using SmartNICs / DPUs?
* Deterministic, line-rate offload
* Isolation from host jitter
* Mature toolchains (eBPF, DPDK, P4, SDKs)
30
What are the key risks associated with SmartNICs / DPUs?
* Vendor lock-in
* Learning curve for P4/eBPF
* Thermal/power budgets at the host edge
31
What metrics are useful for evaluating SmartNICs / DPUs?
* Wire-rate throughput @ packet mixes
* Inline crypto Gbps
* Tail latency (p99.9) for RX→TX
* Host-offload CPU savings
* DPU/SmartNIC core utilization
32
What components are typically found in SmartNICs / DPUs?
* NIC function(s)
* Arm complex
* Hardware offload blocks (crypto, regex, parsers)
* SR-IOV VFs
33
What operations and tunable parameters are associated with SmartNICs / DPUs?
* Enable DPU mode vs NIC mode
* Parser profiles (P4 program or flow tables)
* IPSec/TLS SA lifetimes
* RSS/queue counts
* SR-IOV VF count
* Doorbell/interrupt coalescing
34
What are FPGA/Programmable accelerators used for?
Custom framing/TDM/X.25-like behavior
## Footnote
Examples include AMD Alveo adaptable accelerator cards for bespoke link protocols.
35
List typical applications for FPGA/Programmable accelerators.
* Bespoke link protocols
* Deterministic schedulers
* TDM→IP gateways
* Packet timestamping
* Protocol shims
36
What are the advantages of FPGA/Programmable accelerators?
* Cycle-accurate determinism
* You own the protocol
* Long lifecycle parts
37
What risks are associated with FPGA/Programmable accelerators?
* HDL/P4 expertise
* Development time
* Verification burden
38
What metrics are useful for evaluating FPGA/Programmable accelerators?
* LUT/BRAM/DSP utilization
* Timing closure (slack)
* RX/TX latency budget
* SERDES error counters
39
What operations and tunable parameters are associated with FPGA/Programmable accelerators?
* Bitstream load
* Clock domain config
* FIFO depths
* PCS/PMA settings
* DMA ring sizes
40
What are Industrial PCIe serial & sync cards used for?
Drop-in replacement for multi-port serial ARTIC approaches
## Footnote
Examples include Moxa and Sealevel PCIe adapters.
41
List typical applications for Industrial PCIe serial & sync cards.
* Many-port serial concentrators
* SCADA/OT connectivity
* Synchronous serial to legacy gear
42
What are the advantages of Industrial PCIe serial & sync cards?
* Commercial support
* Modern PCIe
* Driver stacks for major OSes
43
What are the key risks associated with Industrial PCIe serial & sync cards?
* Limited on-card compute compared to DPUs
* Per-port bandwidth caps
44
What metrics are useful for evaluating Industrial PCIe serial & sync cards?
* Per-port overrun/drop rate
* Line-discipline latency
* ISR jitter
* DMA underruns
45
What operations and tunable parameters are associated with Industrial PCIe serial & sync cards?
* Port mode (232/422/485)
* Termination/bias
* Baud & framing
* FIFO/ring sizes
* Interrupt coalescing
46
What are Telephony/T1/E1 PRI adapters used for?
For legacy WAN connections like T1/E1/ISDN
## Footnote
Examples include Sangoma/Digium PCIe T1/E1 PRI cards.
47
List typical applications for Telephony/T1/E1 PRI adapters.
* PRI trunks
* Channelized voice/data
* Lab interop with PBXs
48
What are the advantages of Telephony/T1/E1 PRI adapters?
* Commodity drivers
* Active community (Asterisk)
49
What are the key risks associated with Telephony/T1/E1 PRI adapters?
* Voice-centric assumptions
* Dwindling TDM in new builds
50
What metrics are useful for evaluating Telephony/T1/E1 PRI adapters?
* CAS/PRI error counts
* Slips
* BER
* Echo canceller taps and tail length
* Call setup time
51
What operations and tunable parameters are associated with Telephony/T1/E1 PRI adapters?
* Line coding (AMI/B8ZS)
* Framing (SF/ESF)
* Clock source
* D-channel signaling
* DAHDI buffer sizes
52
What are Device/terminal servers used for?
To put serial ports on the network instead of in the host
## Footnote
Examples include Moxa NPort and Digi serial servers.
53
List typical applications for Device/terminal servers.
* Consolidate remote serial/USB gear
* Headless servers/VMs
* OT/SCADA retrofits
54
What are the advantages of Device/terminal servers?
* Fast to deploy
* Removes PCIe dependency
* TLS/SSH options
55
What are the key risks associated with Device/terminal servers?
* Added LAN hop
* Driver shims
* Not ideal for microsecond-class determinism
56
What metrics are useful for evaluating Device/terminal servers?
* TCP round-trip (p99)
* Port buffer overruns
* Reconnection MTTR
* TLS handshake failure rate
57
What operations and tunable parameters are associated with Device/terminal servers?
* COM-port redirection
* TCP server/client modes
* Nagle/latency settings
* Per-port flow control
* Fail-open/fail-closed
58
What are Embedded RTOS gateways used for?
To roll your own adapter computer
## Footnote
Examples include FreeRTOS, Zephyr RTOS, QNX Neutrino, and RTEMS.
59
List typical applications for Embedded RTOS gateways.
* Protocol bridges
* Deterministic serial/TDM handling
* Safety-critical gateways
60
What are the advantages of Embedded RTOS gateways?
* Full control of timing
* Lean images
* Certification paths (QNX)
61
What are the key risks associated with Embedded RTOS gateways?
* You own the BSP/drivers
* Longer development
* Hardware selection matters
62
What metrics are useful for evaluating Embedded RTOS gateways?
* ISR latency distribution
* Scheduler jitter
* CPU headroom
* Queue depths
* Heap/pool fragmentation
* Watchdog events
63
What operations and tunable parameters are associated with Embedded RTOS gateways?
* Task priorities
* Tickless vs ticked
* Buffer-pool sizes
* DMA descriptors
* Link-layer timers
* Socket backlog
* TLS ciphersuites
64
What are SBCs with hard real-time islands used for?
For cheap deterministic I/O front-ends
## Footnote
Examples include BeagleBone and Raspberry Pi Compute Module 4.
65
List typical applications for SBCs with hard real-time islands.
* Deterministic edge I/O
* Custom serial framing
* Low-latency control loops
66
What are the advantages of SBCs with hard real-time islands?
* Very low BOM
* Huge community
* Rapid prototyping
67
What are the key risks associated with SBCs with hard real-time islands?
* Linux scheduler jitter unless offloaded to PRU/FPGA
* Supply chain variability
68
What metrics are useful for evaluating SBCs with hard real-time islands?
* PRU cycle budget per bit/slot
* GPIO toggle jitter
* End-to-end latency through userland vs RT thread
69
What operations and tunable parameters are associated with SBCs with hard real-time islands?
* PRU firmware load
* Shared memory mailboxes
* Pinmux/device-tree
* DMA settings (SPI/UART)
* Thread affinities/rtprio
70
What is a key consideration when choosing a solution similar to ARTIC?
Identifying whether you want a modern on-card CPU, FPGA, reliable serial/TDM ports, network-enabled remote serial/USB, or a small adapter computer.
71
What metrics should be measured across all options?
* Determinism
* Throughput/goodput
* Offload effectiveness
* Reliability
* Security posture
72
What are some operations and parameters for DPU/SmartNIC?
* set_mode(dpu|nic)
* configure_rss(queues=N)
* load_p4(program)
* ipsec(sa_lifetime, aes_gcm_128)
* tls(offload=on, min_version=1.2)
* irq_coalesce(usec, pkts)
* sriov(vfs=N)
73
What are some operations and parameters for FPGA/Alveo?
* load_bitstream()
* set_serdes(rate, encoding)
* fifo(depth)
* dma(rx_descs, tx_descs)
* parser(rule_table)
74
What are some operations and parameters for PCIe serial/T1E1?
* set_port(rs485, bias=on, term=120Ω)
* baud(2_048_000)
* framing(ESF)
* coding(B8ZS)
* rx_fifo(kB)
* flow(rts_cts)
* clock(source=network)
75
What are some operations and parameters for Device/terminal servers?
* map_com(port=n, tcp_server=on)
* latency(nagle=off)
* tls(version, ciphers)
* reconnect(policy, backoff)
* serial(232/422/485, parity, stopbits)
76
What are some operations and parameters for Embedded RTOS gateway?
* task(create, prio)
* net(buf_pool, mss)
* timer(period_us)
* uart(dma=on, ring=depth)
* watchdog(timeout_ms)
* tls(heap, session_cache)
77
What are some operations and parameters for SBCs with hard real-time islands?
* PRU firmware load
* Shared memory mailboxes
* Pinmux/device-tree
* DMA settings (SPI/UART)
* Thread affinities/rtprio
78
What is the purpose of the Digium TE13x card?
To provide single-span T1/E1 connectivity
79
What type of card is the Digium TE13x?
Single-Span T1/E1 Card
80
True or False: The Digium TE13x card can support both T1 and E1 connections.
True
81
What is the first step in installing the Digium TE13x card?
Power down the system
82
Fill in the blank: The Digium TE13x card is installed in a _______.
[PCI slot]
83
What should be done after inserting the Digium TE13x card?
Power on the system and configure the card
84
What is required for configuring the Digium TE13x card after installation?
Appropriate driver installation
85
What software can be used to configure the Digium TE13x card?
Asterisk
86
What is a key feature of the Digium TE13x card?
Supports hardware echo cancellation
87
List the types of connections supported by the Digium TE13x card.
* T1
* E1
88
True or False: The Digium TE13x card is compatible with Linux-based systems.
True
89
What is a common application for the Digium TE13x card?
VoIP (Voice over Internet Protocol) systems
90
What is the maximum number of simultaneous calls that a Digium TE13x card can handle?
24 calls
91
Fill in the blank: The Digium TE13x card connects to the _______ for T1/E1 signaling.
[network]
92
What type of card does the Digium TE13x fall under?
Telephony interface card
93
What is a recommended practice after installing the Digium TE13x card?
Update the firmware
94
What is the significance of echo cancellation in the context of the Digium TE13x card?
Improves call quality
95
What type of signaling does the Digium TE13x card support?
ISDN and CAS
96
List the installation prerequisites for the Digium TE13x card.
* Compatible PCI slot
* Driver software
97
What troubleshooting step should be taken if the card is not recognized after installation?
Check PCI slot and driver installation
98
What is the role of Asterisk in relation to the Digium TE13x card?
Provides telephony software to use the card
99
What does ARTIC stand for?
Not applicable
## Footnote
ARTIC refers to a specific hardware platform, not an acronym.
100
What is the primary limitation of ARTIC cards for modern SDR?
Not a viable SDR platform today due to lack of RF path, tuners, or wideband ADC/DAC
101
What are the two families of modern SDR workflows?
* SDR devices (e.g., USRP, bladeRF, LimeSDR, PlutoSDR)
* Big offload cards (e.g., SmartNIC/DPU/GPU/FPGA)
102
What is the function of SDR devices like USRP?
Stream samples using UHD, SoapySDR, GNU Radio, etc.
103
What is the maximum sample rate for USRP X310/X300?
Up to ~200 MS/s full-duplex @ 16-bit per interface
104
What is the primary connection type for bladeRF 2.0 micro xA9?
USB 3.0
105
What key operations can be set in SDR using UHD or SoapySDR?
* set_rx_freq
* set_tx_freq
* set_sample_rate
* set_bandwidth
* set_gain(stage=bb|rf)
* set_lo_source(ref, ext10MHz)
* set_clock_source(internal|external)
106
What metrics are crucial for evaluating SDR performance?
* Sustained host sample-rate with zero drops
* Buffer over/underruns
* RF quality metrics (EVM, SNR, BER, etc.)
107
What is an advantage of embedded/standalone SDRs?
Cuts the host I/O bottleneck by processing data on-device
108
What is the role of Rust in embedded SDR applications?
Targets aarch64-unknown-linux-gnu or armv7 and calls UHD/Soapy via FFI on-device
109
What does the term 'new ARTIC' refer to in the context of SDR?
Using DPUs/GPU/FPGA as SDR co-processors for offloading heavy processing
110
What is the purpose of NVIDIA Aerial in SDR?
Full-inline GPU acceleration of L1/L2 for vRAN
111
What is FreeRTOS used for in SDR applications?
Building embedded controllers for radios and narrowband modems
112
What key RF quality metrics should be measured in SDR?
* EVM (RMS, peak)
* SNR
* BER/BLER
* ACLR
* noise figure (NF)
113
What does 'p99.9 latency' refer to in SDR performance metrics?
The 99.9th percentile of latency experienced in the system
114
What is a suitable platform for portable lab and prototyping in SDR?
USRP X3xx (10 GbE/PCIe) + Rust/UHD
115
True or False: ARTIC supports high-rate ADC/DAC.
False
116
Fill in the blank: The Rust toolchain can integrate with SDR devices via _______.
UHD or SoapySDR
117
What are common operations for DSP offloading to FPGA in SDR?
* CIC/half-band/FIR
* channelizers
* DDC/DUC
* correlators
* burst detectors
118
What is an important consideration for networking in SDR co-processors?
Flow steering rules for I/Q streams
119
What is the benefit of using Rust in high-rate network I/Q applications?
Orchestrates while C handles tight loops or uses rust-dpdk crates
120
What should be considered when choosing an SDR platform?
* Target band
* Required instantaneous bandwidth
* E2E latency budget
121
What does UHD stand for in the context of device streaming?
USRP Hardware Driver
122
What is the purpose of the AD9361 in device streaming?
It is a highly integrated RF agile transceiver.
123
What streaming technology is mentioned for raising throughput ceiling?
DPDK (Data Plane Development Kit)
124
Fill in the blank: The USRP X300 and X310 are part of the _______ series.
X Series
125
True or False: SoapySDR is a vendor-specific software defined radio framework.
False
126
What type of applications can be delivered at the edge using AI?
High-Performance AI Applications
127
What is the main focus of the streaming with DPDK presentation?
Increasing throughput in user space drivers
128
What type of document is linked to the AD9361?
Data Sheet
129
Fill in the blank: SoapySDR is a _______ and platform neutral SDR framework.
Vendor
130
What is the significance of the USRP in software-defined radio?
It provides a flexible platform for experimentation and development.
131
List two benefits of using DPDK in streaming applications.
* Increased throughput
* Lower latency
132
What is a key feature of the AD9361 transceiver?
RF agile capabilities
133
True or False: The X300 and X310 models are designed for low-performance applications.
False
134
What does SoapySDR facilitate in software-defined radio?
Interoperability across different hardware platforms
135
Fill in the blank: The technical overview document discusses delivering AI applications at the _______.
Edge
136
What is the main problem that robots and radio systems face?
Need to move lots of data fast and predictably
137
What is the solution for when the main CPU can't keep up with strict timing?
Offload the most time-critical work to specialized hardware or a tiny real-time OS
138
What was ARTIC?
An IBM add-on card with its own CPU (Intel i960) and a tiny real-time kernel
139
Why was ARTIC significant in its time?
Provided predictable timing, fewer missed bytes, and kept the host CPU free
140
What are some reasons ARTIC is not great now?
Legacy hardware, hard to find, modern tools like Rust don't target its i960 CPU
141
What are SmartNICs/DPUs used for?
Offload packet handling, crypto, and sometimes radio 'fronthaul' traffic
142
What is a key advantage of using SmartNICs/DPUs?
Run Linux on Arm cores, excellent compatibility with Rust
143
What is the purpose of FPGAs/Programmable NICs?
Implement custom logic in hardware for filters, decimators, packet parsers
144
When are FPGAs especially useful?
When you need exact timing or custom protocols
145
What do industrial PCIe serial or T1/E1 cards replace?
Modern replacements for 'lots of serial ports'
146
What is the function of device/terminal servers?
Put serial/USB ports on the network instead of inside the PC
147
What do embedded RTOS gateways like FreeRTOS and Zephyr provide?
A small microcontroller runs a real-time OS and handles timing-critical I/O
148
How does Rust fit with SmartNIC/DPU and embedded Linux boards?
Great compatibility, build for aarch64-unknown-linux-gnu
149
What are the types of radios suitable for SDR?
* USRP * bladeRF * LimeSDR * Pluto
150
What libraries are used to control SDRs?
UHD or SoapySDR
151
What metrics are important for evaluating performance in robotics?
* Latency & jitter * Drops/overruns * Throughput/goodput * RF quality * Reliability * Security
152
What does low latency and jitter indicate?
Good performance
153
What does a high number of drops/overruns suggest?
Buffers too small or CPU too slow
154
What is the core lesson regarding real-time behavior in robotics?
Offload timing-critical work, keep main app in Rust, measure latency and watch buffers
155
What is a decision guide for needing lots of reliable serial ports?
Use modern PCIe serial card or device server; write your app in Rust
156
What is the best option for precise sensor/actuator timing?
MCU + Zephyr/FreeRTOS as a timing gateway
157
What should you use for high-rate Ethernet or radio data with strict timing?
SmartNIC/DPU or FPGA for the hot path
158
What are the starter kits for beginners in robotics?
* Device server (serial-over-IP) + Rust app on a PC * PlutoSDR for basic RF labs
159
What is the advanced starter kit for robotics?
* USRP X-series + SmartNIC/GPU offload; Rust orchestrates, C/CUDA/FPGA do DSP
160
Fill in the blank: For SDR, control via ______ from Rust.
UHD/SoapySDR
161
What should be provided to sketch a parts list and test plan?
Interfaces, target rates, and latency budget
162
What is the primary function of deterministic scheduling in an operating system on a spacecraft?
Runs hard real-time tasks on precise deadlines
## Footnote
Examples include attitude control loops and thruster pulse timing.
163
What is the purpose of partitioning and fault containment in spacecraft operating systems?
Separates software into memory/time partitions to prevent faults in one partition from crashing flight-critical control
## Footnote
Follows ARINC 653-style time/space partitioning.
164
What does FDIR stand for in the context of spacecraft operating systems?
Fault Detection, Isolation, and Recovery
165
How does a spacecraft operating system handle device drivers and I/O timing?
Owns low-level interfaces and enforces bus access discipline
## Footnote
Examples include MIL-STD-1553 and SpaceWire.
166
What is the role of timekeeping and synchronization in a spacecraft OS?
Maintains a robust spacecraft time base and supports time-tagged commands and telemetry
167
What aspects does resource management under constraints cover in a spacecraft OS?
Schedules CPU, memory pools, file storage, and downlink bandwidth
168
What is the function of Command & Data Handling (C&DH) in a spacecraft OS?
Routes commands, logs telemetry, manages on-board files, and implements reliable store-and-forward downlink
169
What does mode management and autonomy hooks entail in spacecraft operating systems?
Executes mode transitions with interlocks and provides scheduling frameworks for semi-autonomous operation
170
What are the key responsibilities of integrity, security, and radiation resilience in a spacecraft OS?
Supports ECC memory scrubbing, memory protection, and secure boot/attestation
171
What is VxWorks and why is it commonly used in spacecraft?
A widely used RTOS chosen for tight control loops and a rich driver ecosystem
172
What is RTEMS and where is it commonly used?
An open-source RTOS frequently paired with LEON/SPARC processors in European missions
173
What is the purpose of the dual-lane architecture pattern in spacecraft?
One lane drives hard real-time control while the other runs autonomy and high-level planning
174
Fill in the blank: The IMA-style partitioned RTOS architecture uses multiple '________' time-multiplexed on one CPU.
virtual computers
175
What is a common architecture for planetary rovers and landers?
Flight computers run an RTOS for motion control, while a separate compute module may handle vision and science data
176
What are the typical OS features used for Attitude & Orbit Control (AOCS) in spacecraft?
Fixed-priority preemptive RT scheduling, high-resolution timers, DMA drivers
177
What design tips should be considered for measuring spacecraft OS performance?
Measure ISR/task latency distributions, prove zero over/underruns, and verify memory integrity
178
True or False: Missions often choose 'just Linux' for all spacecraft functions.
False
## Footnote
Pure Linux requires careful engineering for determinism and fault isolation.
179
What is the advantage of a hybrid OS architecture in spacecraft?
Combines RTOS for life-critical loops with Linux for heavy processing and data crunching
ELARA/ODIN
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Decks in class (14)
# Cards
