OS7 Flashcards

(14 cards)

1
Q

Describe how paging supports non-contiguous allocation.

A

Divide physical memory into frames. Divide logical memory into pages. Use a page table to map between pages and frames.

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2
Q

Define a frame.

A

It is a fixed-size block of physical memory.

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3
Q

Describe how to allocate N pages of memory.

A

Find N free frames. Create entries in page table to map each page to a frame.

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4
Q

Describe the format of the logical address in paging.

A

Page number used to index into a page table containing the base address of the page. Page offset combined with the base address gives the physical memory address.

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5
Q

What does the page table store?

A

Page table entries which map between logical and physical addresses.

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6
Q

State the amount of fragmentation when using paging.

A

No external fragmentation. On average 0.5N frame of internal fragmentation per process.

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7
Q

State and describe the registers required for paging.

A

Page-table base register points to the page table. Page-table length register indicates the size of the page table.

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8
Q

State the performance impact of paging.

A

Each data/instruction access requires two memory accesses, so is slower.

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9
Q

What is the translation lookaside buffer?

A

It is a hardware cache for page table lookups.

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10
Q

Describe the operation of the translation lookaside buffer.

A

If the translation is in the TLB, use it. Otherwise it is a TLB miss, so look the address up in the page table. When the TLB is full, remove entries by least recently used.

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11
Q

Define hit ratio.

A

The proportion of time a page table entry is found in TLB.

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12
Q

What information do protection bits store in page table entries?

A

Whether page is only accessible in kernel mode. Whether read/write/execute to page is permitted. Valid/invalid.

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13
Q

State the 3 uses of sharing pages.

A

Sharing copy of read-only code between processes, Multiple threads sharing the same process space, IPC with shared memory.

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14
Q

Describe a two-level, forward mapped page table.

A

The logical address is divided into p1, p2 and the offset. Two page tables L1 and L2. Page table base register points to L1, L1[p1] gives the address of the relevant page in L2. (pageInL2[p2] + offset) gives the physical address.

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