von neumann architecture
consists of a single shared, memory for programs and data
control unit
arithmetic logic unit
operand
part of the computer instruction which specifies what data is to be processed
opcode
the instruction executed by the CPU
register
general purpose register
holds the temporary data while performing different operations
special register
holds the status of the program
program counter
stores the address of the next instruction to be fetched
memory address register (MAR)
stores the memory address where data is to be read from
memory data register (MDR)
stores data that has just been read from memory
current instruction register (CIR)
stores the instruction that is currently being executed
index register (IX)
used for indirect addressing
accumulator
a register that temporarily stores arithmetic and logic data
status register
interpreted as independent flags, each flag is set depending on an event
system clock
data bus
address bus
control bus
factor affecting computer performance: data bus width
factor affecting computer performance: clock speed
factor affecting computer performance: cache memory
factor affecting computer performance: number of cores
Port
acts as an interface between computers and other peripheral devices