PLA is Combinational Circuit or Sequential Circuit?
Combinational
RAM and ROM are Combinational Circuit or Sequential Circuit?
Sequential
Truth Table of SR flip flop
S = 1 R = 0 -> Set(1)
S = 0 R = 1 -> Reset(0)
both 0 = memory
both 1 = invalid
Truth Table of D flip flop
D = 0 -> Reset(0)
D = 1 -> Set(1)
Clk = 0 -> Memory
Truth Table for JK flip flop
J = K = 0 -> memory (Qn)
J = K = 1 -> Compliment (Qn’)
J = 0, K = 1 -> reset (0)
J = 1, K = 0 -> Set (1)