AND Gate
=D-
- Only both fields
|A|B|Y|
|0|0|0|
|0|1|0|
|1|0|0|
|1|1|1|
OR Gate
XOR Gate
Combining Boolean Operations
Manipulating Boolean Expressions
Karnaugh Maps
D Type Flip Flop
● Logic circuit uses 4 NAND gates
● Updates the value of Q to the value of D whenever the clock (CLK) rises
● The value of Q is the stored value
Adder
Half Adder
|A|B|C|S|
|0|0|0|0|
|0|1|0|1|
|1|0|0|1|
|1|1|1|0|
Full Adder
|A|B|Cin|Cout|S|
|0|0| 0 | 0 |0|
|0|0| 1 | 0 |1|
|0|1| 0 | 0 |1|
|0|1| 1 | 1 |0|
|1|0| 0 | 0 |1|
|1|0| 1 | 1 |0|
|1|1| 0 | 1 |0|
|1|1| 1 | 1 |1|