cef_flashcards

Question 1

Front

Answer 1

Back

Question 2

What does ASIC stand for?

Answer 2

Application-Specific Integrated Circuit

Question 3

What does TCAM stand for?

Answer 3

Ternary Content-Addressable Memory

Question 4

Layer 2 forwarding is done in hardware with ASICs and […] memory.

Answer 4

CAM

Question 5

Layer 3 forwarding can be done in hardware with ASICs and […] memory.

Answer 5

TCAM

Question 6

In software-based routers, the […] is responsible for the Control Plane and Data Plane.

Answer 6

General-Purpose CPU

Question 7

In hardware-based routers, the […] handles the Control Plane.

Answer 7

CPU

Question 8

In hardware-based routers,  […] are responsible for the Data Plane.

Answer 8

ASICs

Question 9

In hybrid routers, the […] handles the Control Plane.

Answer 9

CPU

Question 10

In hybrid routers, the […] handles the Data Plane.

Answer 10

NP (Network Processor)

Question 11

Show processes running on the CPU:<br></br>R1# […]

Answer 11

<b>show processes cpu</b>

Question 12

[…] switching requires routers to perform routing lookups using the CPU for every packet.

Answer 12

Process

Question 13

In Process Switching, the […] process is responsible for forwarding packets.

Answer 13

IP Input

Question 14

Fast Switching allows the router to build a […] in memory.

Answer 14

Fast-Switching Cache

Question 15

Fast Switching: To create cache entries, the first packet to a destination is …

Answer 15

process-switched

Question 16

What does CEF stand for?

Answer 16

Cisco Express Forwarding

Question 17

What does FIB stand for?

Answer 17

Forwarding Information Base

Question 18

What does RIB stand for?

Answer 18

Routing Information Base

Question 19

RIB is another name for the […].

Answer 19

routing table

Question 20

The FIB is built using information in the […].

Answer 20

RIB

Question 21

The Adjacency Table is built using information in the […].

Answer 21

ARP table

Question 22

CEF uses two tables in the Data Plane: […] and […]

Answer 22

FIB  /  Adjacency Table

Question 23

In […] CEF, the FIB/Adjacency Table are stored in RAM and processed by the CPU.

Answer 23

Software

Question 24

In […] CEF, the FIB is stored in TCAM, Adjacency Table stored in separate memory, and they are processed by an ASIC.

Answer 24

Hardware

Question 25

Packets which CEF can't handle are [...] to IP Input.

Answer 25

punted

Question 26

Show the FIB:
R1# [...]

Answer 26

show ip cef

Question 27

FIB: [...] is specified as a Next Hop when there is no default route defined.

Answer 27

no route

Question 28

FIB: Next Hop [...] = packets to these destinations should be dropped

Answer 28

drop

Question 29

FIB: Next Hop [...] = packets to these destinations should be received by the router

Answer 29

receive

Question 30

FIB: Next Hop [...] = networks/destinations directly connected to the router

Answer 30

attached

Question 31

The [...] is a version number for the FIB.

Answer 31

epoch

Question 32

CEF: [...] is the default load-balancing method.

Answer 32

per-destination

Question 33

CEF: Confiure per-packet load-balancing:
R1(config-if)# [...]

Answer 33

ip load-sharing per-packet

Question 34

Show detailed information about FIB entries:
R1# [...]

Answer 34

show ip cef detail

Question 35

Clear the IPv4 CEF table:
R1# [...]

Answer 35

clear cef table ipv4

Question 36

Show the Adjacency Table:
R1# [...]

Answer 36

show adjacency

Question 37

Show detailed information about entries in the Adjacency Table:
R1# [...]

Answer 37

show adjacency detail

Question 38

CEF: The [...] contains Layer 3 next-hop information.

Answer 38

FIB

Question 39

CEF: The [...] contains Layer 2 next-hop information.

Answer 39

Adjacency Table