Flyback Flashcards

(31 cards)

1
Q

Lp

A

Primary Magnetizing Inductance

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2
Q

Ip

A

Peak primary current

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3
Q

FS

A

Switching Frequency

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4
Q

Ton

A

MOSFET on-time per cycle (D / fs)

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5
Q

D

A

Duty Cycle
(Vout+Vdiode)N/(Vin +(Vout+Vdiode)N)

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6
Q

T

A

Period (1/fs)

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7
Q

Np

A

Number of Turns on the primary side

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8
Q

Ns

A

Number of turns on the secondary side

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9
Q

toff

A

MOSFET off-time per cycle ((1 − D) / fs)

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10
Q

N

A

Np/Ns

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11
Q

Draw the two energy-storage phases of a flyback

A

The two energy-storage phases of an ideal flyback converter are the charging phase (primary is active, energy stored in the magnetizing inductance) and the discharging phase (secondary is active, energy transferred to the load).

Phase 1: Charging (Magnetizing) - MOSFET is ON
A representation showing (V_{in}) connected across the primary, the MOSFET closed, and the secondary diode open.

Phase 2: Discharging (Demagnetizing) - MOSFET is OFF
A representation showing the MOSFET open, the primary open circuit, the secondary winding driving current through the forward-biased diode to the load/capacitor.

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12
Q

write the volt-second balance equation

A

The principle of volt-second balance for an ideal inductor states that over one complete switching cycle in a steady state, the net change in magnetic flux must be zero. The total volt-seconds applied across the magnetizing inductance (Lm) during the on-time must equal the total volt-seconds applied during the off-time.

VinDT=(VoutN)((1-D)T)
Vin*D = Vout * N *(1-D)

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13
Q

Label the three current waveforms you see on the primary side

A

Ip(t) : ramp on top of DC (CCM) or triangle (DCM)
Imag : pure triangle (magnetizing)
Ileak : narrow spike at turn-off

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14
Q

Give two ways to measure leakage inductance

A

one with a lab LCR meter, one with a scope
LCR: Short the secondary coil terminals. Solder a wire across the secondary winding terminals. This effectively cancels out the magnetizing inductance when measured from the primary side.
Connect the LCR meter to the primary coil terminals.
Set the LCR meter to measure inductance (L mode) at a suitable frequency (often 1 kHz, or the converter’s operating frequency if possible).
Read the value. The value displayed on the LCR meter is the leakage inductance of the primary winding

SCOPE: Using a Current Probe (Easiest and non-invasive)
Connect a current probe around the primary winding wire or the MOSFET drain lead.
Connect the current probe’s output to an input channel of the oscilloscope.
Set the oscilloscope channel’s scale according to the probe’s sensitivity (e.g., 1A/V).
Power the flyback circuit and observe the current waveform.
Analyze the waveform: The current waveform during the MOSFET’s ON time will show a rising slope. Any sharp peaks or ringing at the turn-off transition are often due to the energy stored in the leakage inductance interacting with parasitic capacitances. The magnitude of this current can be measured from the screen.

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15
Q

Write the single-line energy equation that links Pin, Lp, Ip_pk and fs

A

Pin = ½ Lp Ip² fs

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16
Q
A

Ip_new = Ip_old / √2 (ramp slope doubles, but peak drops 29 %)

17
Q

List three design variables you can trade off to reduce peak primary current.

A

Increase Lp
Increase fs
Add parallel secondaries (share energy)

18
Q

Why does a flyback operated in DCM give better cross-regulation between multiple outputs?

A

Each secondary conducts its own energy packet; load variations do not steal volt-seconds from other windings.

19
Q

Sketch the MOSFET Vds waveform and mark the three voltage levels: Vin, Vor, and Vspike.

A

Vds

Vin+VOR+Vspike
| ┌───┐
| │ │
|—— ┘ └ ——– Vin
|__________|__________ t
ton toff

20
Q

Derive the reflected voltage Vor in terms of Vout, Vdiode and turns ratio n = Np/Ns.
Professional answer:

A

Vor = (Vout + Vdiode) · n

21
Q

Pick a random 650 V MOSFET—prove its SOA at 2 A for 200 µs at 125 °C.

A

Device: STP65N65M5
SOA graph: 400 V, 2 A → 100 µs @ 25 °C; derate 2× @ 125 °C → 50 µs safe.
200 µs exceeds limit ⇒ add soft-start to keep linear time < 50 µs.

22
Q

Write the RCD snubber power-loss formula and state the two worst-case corners you must evaluate.

A

P_R = ½ Lleak Ip² fs
Corners: max temp (125 °C) & max Vin (gives highest Vclamp).

23
Q

Choose a secondary diode: give the three electrical parameters that matter and the derating rule.

A

Maximum Repetitive Reverse Voltage > 1.3 × (Vout + Vor/Ns)
Average Current > Iout
Reverse-Recovery Time < .1 * switching period
Derate: 50 % voltage, 50 % current per NASA-STD-5012.

24
Q

Explain why the opto-coupler CTR drop at –55 °C can collapse your loop gain and how you prevent it.

A

CTR –40 % @ –55 °C → add 20 % overhead in pull-up resistor; or use digital isolator.

25
Draw the Type-II error-amp around a TL431 and label the pole, zero, and mid-band gain.
+----RLED-----+---- C1 ---+ | | | TL431 cathode R2 | | | | +----R1------+---- C2 --- GND
26
Give two PCB layout tricks that cut common-mode EMI from the drain node.
Shield layer tied to primary ground under drain copper. Y-cap primary GND ↔ chassis right at transformer center-pad.
27
State the IPC-2221 creepage requirement for 100 V secondary-to-primary at sea-level vs. 50 000 ft.
100 V: 0.5 mm sea-level, 1.0 mm @ 50 000 ft (barometric).
28
How do you guarantee the transformer saturates nowhere over –55 °C to +150 °C?
Bmax = (Lp · Ip_pk) / (Np · Ae) < 0.25 T @ 100 °C (PC40 ferrite).
29
What lab test proves that the core loss number you calculated is actually true?
Wrap two turns of wire around core, drive with sine, measure P with power analyser, scale by ΔB².
30
MIL-STD-461 CE102 fail at 500 kHz—flyback contributor: CM or DM and why?
CM dominant: drain 200 V pk, 15 pF to heatsink → 20 mA CM current; add 2 mH CM choke, 4 nF Y-cap.
31
Your controller dies and the MOSFET stays on—how much energy is stored in Lp and where does it go?
Energy = ½ Lp Ip² (at that instant). Primary fuse blows; if fuse is too slow, avalanche rating of MOSFET must absorb it → verify single-pulse avalanche energy EAS ≥ ½ Lp Ip².