graphics processing units (GPUs)
- accelerators that supplement a CPU, do not need to perform all tasks for a CPU
- do not rely on multilevel caches to overcome transfer time
- rely on hardware multithreading instead
message passing
- communicating between multiple processors by explicitly sending and receiving information
- alternative organization of multiprocessor where each own has own private physical address space
send message routine
A routine used by a processor in machines with private memories to pass a message to another processor
receive message routine
A routine used by a processor in machines with private memories to accept a message from another processor
clusters
collections of computers connected via I/O over standard network switches to form a message-passing multiprocessor
software as a service (SaaS)
rather than selling software that is installed and run on customers’ own computers, software is run at a remote site and made available over the Internet typically via a Web interface to customers
network bandwidth
- the peak transfer rate of a network
- can refer to the speed of a single link or the collective transfer rate of all links in the network
- multicore chips use on-chip networks to connect cores, cluster use LANs to connect servers
bisection bandwidth
- bandwidth between two equal parts of a multiprocessor
- this measure is for a worst case split of the multiprocessor
fully connected network
- a network that connects processor-memory nodes by supplying a dedicated communication link between every node
- aka every processor has a bidirectional link to every other processor
multistage network
a network that supplies a small switch at each node
crossbar network
a network that allows any node to communicate with any other node in one pass through the network
memory-mapped I/O
An I/O scheme in which portions of the address space are assigned to I/O devices, and reads and writes to those addresses are interpreted as commands to the I/O device
device driver
a program that controls an I/O device that is attached to the compute
polling
- process of periodically checking the status of an I/O device to determine the need to service the device
- alternative to interrupts, used to improve network performance
GPU memory structure
-rely on smaller streaming caches and multithreading of SIMD instructions to hide long latency of DRAM
organization of multiprocessor with multiple private address spaces
- each processor has own memory, storage, and OS
- connected by an interconnection network
- have better communication performance than clusters with shared memory
weakness of private memory
- lose dependability
- shared memory makes it easier to replace computer without bringing down system
when should you use polling?
- for small packets, makes the lowest latency when polling with load/store
- bad for big packets because requires processor to be busy through entire data transfer (slow af)
